In the field of microelectronics, layers of various materials are commonly formed over wafers or other substrates. Such materials include polymers, oxides, nitrides, metals, and semiconductors (e.g., polysilicon). It is common to etch structures, such as vias and trenches, through one or more of the layers at desired locations in constructing various electrical structures and semiconductor devices. Formation of such structures requires removal of some portions of a material layer.
Material is removed by etching through an etch-resistant mask with either a chemical etchant (wet etching) or with a dry etching process, such as reactive ion etching (RIE) or plasma etching. The etch mask has a pattern generally conforming to the structures to be formed. Generally, anisotropic etching processes are preferred for fine structures since they allow the structure to conform to the mask patterns. Nonetheless, no process is completely anisotropic and, thus, undercutting and other variations between the etched pattern and the mask will occur.
The degree to which a given process is anisotropic depends upon the processing conditions (e.g., temperature, relative concentrations of the etchant's chemical components, agitation rate, plasma energy, etc.). The etch rates also depend upon the area of the mask aperture for the structure, and upon the depth of the structure, particularly for structures formed through relatively small apertures.
It is often necessary to determine the optimum set of processing conditions and etch time for forming a structure in a particular material layer. This optimization usually requires conducting a number of trial processing runs with a set of test structures, each run using a different set of processing conditions and/or etch time, and examining the resulting structures.
Unfortunately, the examination of an etched structure becomes more difficult as its aspect ratio (depth-to-width ratio) increases. The examination of a fine structure, such as a high aspect-ratio via, is typically accomplished by cleaving the substrate or wafer along a cross-sectional plane passing through the structure, and viewing the structure from above the cross-sectional plane, either straight-on or at a slight angle from normal. Unfortunately, a significant amount of time is required to cleave the substrate and prepare it for examination, and the cleaving operation destroys the structure to be examined.
Once the best processing conditions and etch time for a particular structure have been determined, it is often desirable to include a small number of test structures on the production masks to enable periodic monitoring of the production substrates and wafers. Such monitoring may be used to trouble-shoot the etch process or to improve yields by ensuring that the etching process is successful before continuing to the next processing step. Unfortunately, the above cleaving procedure prevents such periodic monitoring since it destroys the substrate.
Accordingly, there is a need in the art for a fast, non-destructive method of examining etched structures, particularly those having small dimensions and/or high aspect ratios, and for a structure which facilitates such a technique. A fast and non-destructive examination capability would greatly speed the optimization of etching processes and readily facilitate process monitoring of production substrates and wafers.